04 05 15

Pagina 1

Politecnico di Milano Dipartimento di Elettronica e Informazione prof. Fabrizio Ferrandi Digital Systems Design Methodologies 1 – May 4th 2015 Polimi ID _______ _______________________ Surname _______ __________________ Name _____________________  This is a closed -book examination. You cannot use computers, phones or laptops during the exam.  Paper will be provided, but you should bring and use writing instruments t hat yield marks dark enough to be read easily. Erasable pens can be used.  Total available time: 1h:45m. Exercise 1 (9 points) _________________________ Exercise 2 (6 points) _________________________ Exercise 3 (8 points) _________________________ Exercise 4 (5 points) _________________________ Exercise 5 (5 points) _________________________ Digital Systems Design Methodologies 1 – May 4th 2015 2 /8 Exercise n. 1 Given the following circuit: and the following technology library: a) Build the subject graph and determine the formulation of the binate covering problem for the technology mapping targeting area minimization. b) Identify one feasible solution (not necessarily the optimal one) using the DAGON heuristic. Digital Systems Design Methodologies 1 – May 4th 2015 3 /8 Digital Systems Design Methodologies 1 – May 4th 2015 4 /8 Exercise n. 2 Given the following circuit: where the delay of the OR and AND gates is equal to 2, while the delay of the inverters is equal to 1. a) Compute the circuit delay given these values applied to the inputs: A=1, B=1, C=1, D=1, E=0. b) Check with the proper algorithm if the output X is stable at time T=6 Digital Systems Design Methodologies 1 – May 4th 2015 5 /8 Exercise n. 3 Given the following C function: int fir(int x0,int x1,int x2,int x3,int x4,int x5,int x6, int h0,int h1,int h2,int h3,int h4,int h5,int h6) { int…