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Dipartimento di Elettronica e Informazione Politecnico di Milano 20133 Milano (Italia) Piazza Leonardo da Vinci, 32 Tel. (+39) 02-2399.3400 Fax (+39) 02-2399.3411 Advanced Computer Architectures September 7, 2016 Prof. Donatella Sciuto Name Last Name UID (aka #Matricola) Problem 1 (6 points) Problem 2 (4 points) Problem 3 (6 points) Question 1 (6 points) Question 2 (5 points) Question 3 (5 points) Total (32 points) To pass the exam (the following conditions are in AND): • The overall score has to be equal or higher than 18 • At least 1 problem has to be correct (at least it has to be evaluated with 85% of the “available” points) • At least 9 points from the problems At least 9 points from the questions Problem 1 Design and describe (all the decisions have to be motivated) a 1-BHT and a 2-BHT able to execute the following assembly code. (R0 is set to 0, R1 is set to 0) LOOP: LD F3 4 R0 ADDI R0 R0 1 ADDD F1 F3 F3 MULTD F2 F3 F1 ADDI R1 R1 1000 LOOP2: MULTD F2 F2 F3 SUBI R1 R1 1 BNEZ R1 LOOP2 SUBI R0 R0 1 BNE R0 R1 LOOP The obtained result, in terms of miss predictions, is inline with theoretical characteristics of the two predictors? If no, please, change the value of R0 and R1 to make it. Please effectively support your answer. Answer Problem 2 Assume that the following code is executed on a CPU with dynamic scheduling based on TOMASULO and with the following units: • the LOAD queue has 2 reservation stations with latency equal to 2 • the STORE queue has 2 reservation stations with latency equal to 2 • 3 ADD/SUBD units with latency equal to 2 • 2 MUL units with latency equal to 3 • an integer unit Having R1 equal to 64, assuming static branch prediction backward taken and forward not taken. Consider the following code and schedule the first iteration of the loop for the…