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15 02 2024 E TS Silvano

Esame completo di Advanced Computer Architectures per il corso di Computer Engineering presso Politecnico di Milano. Materiale proveniente dall’archivio storico Studwiz e classificato per la consultazione online.

Advanced Computer ArchitecturesEsame completo

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Esame completo di Advanced Computer Architectures per il corso di Computer Engineering presso Politecnico di Milano. Materiale proveniente dall’archivio storico Studwiz e classificato per la consultazione online.

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Surname (COGNOME) SOLUTION Name POLIMI Personal Code Signature Politecnico di Milano, 15 February, 2024 Course on Advanced Computer Architectures Prof. C. Silvano EX1 ( 6 points) EX2 ( 4 points) EX3 ( 3 points) EX4 ( 2 points) Q1 ( 5 points) Q2 ( 5 points) QUIZZES ( 8 points) TOTAL (33 points) Course on Advanced Computer Architectures – prof. C. Silvano EXAM 15 Feb. 2024 – Please write in CAPITAL LETTERS AND BLACK/BLUE COLORS!!! Page 1 - SOLUTION EXERCISE 1 – Tomasulo (6 points) Please consider one iteration of the following assembly loop code: LOOP: lw $t1,VECTA($t0) I2: lw $t2,VECTB($t0) I3: add $t3,$t1,$t2 I4: add $t4,$t3,$t3 I5: sw $t3,VECTC($t0) I6: sw $t4,VECTD($t0) I7: addi $t0,$t0,4 I8: bne $t0,$t5,LOOP to be executed on a CPU1 with dynamic scheduling based on TOMASULO algorithm with all cache HITS, a single Common Data Bus and: • 2 RESERVATION STATIONS (RS1, RS2) for 2 LOAD/STORE units (LDU1, LDU2) with latency 6 • 2 RESERVATION STATIONS (RS3, RS4) for 2 ALU/BR FUs (ALU1, ALU2) with latency 2 1. Please complete the following table for CPU1: INSTRUCTION ISSUE START EXEC WRITE RESULT Hazards Type RSi UNIT LOOP:lw $t1,VECTA($t0) 1 2 8 None RS1 LDU1 I2: lw $t2,VECTB($t0) 2 3 9 None RS2 LDU2 I3: add $t3,$t1,$t2 I4: add $t4,$t3,$t3 I5: sw $t3,VECTC($t0) I6: sw $t4,VECTD($t0) I7: addi $t0,$t0,4 I8: bne $t0,$t5,LOOP 2. Calculate the CPI1 : CPI1 = _______________________________________________________________ Course on Advanced Computer Architectures – prof. C. Silvano EXAM 15 Feb. 2024 – Please write in CAPITAL LETTERS AND BLACK/BLUE COLORS!!! Page 2 - SOLUTION Let’s assume to execute the same loop iteration on a CPU2 with dynamic scheduling based on TOMASULO algorithm with all cache HITS, a single Common Data Bus and more reservation stations as follows: • 4…

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