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16 07 2020 E T Santambrogio

Esame completo di Advanced Computer Architectures per il corso di Computer Engineering presso Politecnico di Milano. Materiale proveniente dall’archivio storico Studwiz e classificato per la consultazione online.

Advanced Computer ArchitecturesEsame completo

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Esame completo di Advanced Computer Architectures per il corso di Computer Engineering presso Politecnico di Milano. Materiale proveniente dall’archivio storico Studwiz e classificato per la consultazione online.

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Dipartimento di Elettronica e Informazione Politecnico di Milano 20133 Milano (Italia) Piazza Leonardo da Vinci, 32 Tel. (+39) 02-2399.3400 Fax (+39) 02-2399.3411 Advanced Computer Architecture July 16, 2020 Prof. Marco Santambrogio Name Last Name The student has to choose 2 out of the 3 exercises. If all the 3 exercises will be completed, just the 2 with the lowest score will be considered. This is an open book exam, which means the students can you use all their notes (we do not care of the format) but they cannot share their exams with anyone during the test. At the end of the exam, when the professor will call it, each student has to upload at most 2 PDF files using the Microsoft Form share via the Zoom chat at the beginning of the exam: NOTE: if you are doing problem 1 and 3, upload your files using the corresponding box 1 and 3. Few notes on the files: 1. You have to submit 1 PDF per question 2. Each PDF has to be max 10MB 3. Each PDF has to be named as codice persona plus the exe, e.g., 10000000_exe1.pdf 4. Each PDF has to report the name and the codice persone on each page 5. All these points are are in logic AND, if one of them will not be respected, the ENTIRE exam will not be evaluated Problem 1 (50%) Problem 2 (50%) Problem 3 (50%) Total (100%) Problem 1 In this problem we will examine the execution of a code segment on the following single-issue out-of-order processor: You can assume that: • All functional units are pipelined • ALU operations take 1 cycle • Memory operations take 2 cycles (includes time in ALU) • Floating-point add instructions take 3 cycles • Floating-point multiply instructions take 4 cycles • There is no register renaming • Instructions are fetched, decoded and issued in order • The issue stage is a buffer of unlimited length that holds…

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Prima pagina: 16 07 2020 E T Santambrogio