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Esame completo di Advanced Operating Systems per il corso di Computer Engineering presso Politecnico di Milano. Materiale proveniente dall’archivio storico Studwiz e classificato per la consultazione online.

Advanced Operating SystemsEsame completo

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Esame completo di Advanced Operating Systems per il corso di Computer Engineering presso Politecnico di Milano. Materiale proveniente dall’archivio storico Studwiz e classificato per la consultazione online.

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Politecnico di Milano FACOLTÀ DI INGEGNERIA DELL’INFORMAZIONE Advanced Operating Systems A.A. 2014-2015 – Exam date: 25 February 2015 Prof. William FORNACIARI Surname (readable)........................................ Name (readable)............................ Matr................................................................. Signature........................................ Q1 Q2 Q3 TOT NOTES It is forbidden to refer to texts or notes of any kind as well as interact with their neighbors. Anyone found in possession of documents relating to the course, although not directly relevant to the subject of the examination will cancel the test. It is not allowed to leave during the first half hour, the task must still be returned, even if it is withdrawn. The presence of the writing (not delivered) implies the renunciation of any previous ratings. Question Q1 Describe the Earliest Deadline First and Rate Monotonic Scheduling, making also a comparison to put in evidence limits and range of applicability. 1/10 Question Q2 Consider the following fragment of an hypothetical datasheet which describes some registers of a GPIO interrupt peripheral: PINIRQ is a peripheral designed to generate interrupts when certain GPIO pins change state. Bit access modes:  u = undefined, writing has no effect, reading returns zero  rw = software reading and writing is allowed  r-c1 = can be read by software, writing 0 has no effect, writing 1 clears the bit PINIRQ_CR: Address: 0xff001000, Initial value upon reset: 0x00 This is an 8 bit register used to configure the peripheral. 7 6 5 4 3 2 1 0 CLR IRQ EN u u u rw u rw u rw  EN: Set this bit to 1 to enable the peripheral  IRQ: If this bit is 1, an interrupt is generated when any bit in PINIRQ_SR is set  CLR: Setting this bit to 1 resets all…

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