29 09 15b

Pagina 1

Dipartimento di Elettronica e Informazione Politecnico di Milano 20133 Milano (Italia) Piazza Leonardo da Vinci, 32 Tel. (+39) 02-2399.3400 Fax (+39) 02-2399.3411 Advanced Computer Architectures September 29, 2015 Prof. Donatella Sciuto Name Last Name Problem 1 (5 points) Problem 2 (5 points) Problem 3 (6 points) Question 1 (6 points) Question 2 (5 points) Question 3 (5 points) Total (32 points) To pass the exam (the following conditions are in AND): • The overall score has to be equal or higher than 18 • At least 1 problem has to be correct (at least it has to be evaluated with 85% of the “available” points) • At least 9 points from the problems • At least 9 points from the questions Problem 1 Assume that a given 5 stages pipeline MIPS architecture is working with a clock cycle equal to 2 ns. Using the MIPS code shown below, I1: add $s3, $s2, 2 I2: sub $s4, $s3, $s1 I3: add $s5, $s4, $s1 I4: lw $s6, 4($s4) I5: sub $s7, $s4, $s6 a) Draw the pipeline schema showing all the RAW data conflicts. Solve the conflicts without using rescheduling and path forwarding. b) Reschedule the instructions to reduce the stalls; Draw the pipeline schema showing all the RAW data conflicts. c) The forwarding paths have been included in the pipeline. Draw the pipeline schema showing all the forwarding paths that have to be used to solve the conflicts. Answer a) Show all the RAW data conflicts Istr CK1 CK2 CK3 CK4 CK5 CK6 CK7 CK8 CK9 CK10 CK11 CK12 CK13 I1 IF ID EX MEM WB I2 IF ID EX MEM WB I3 IF ID EX MEM WB I4 IF ID EX MEM WB I5 IF ID EX MEM WB CPU without forwarding Istr CK1 CK2 CK3 CK4 CK5 CK6 CK7 CK8 CK9 CK10 CK11 I1 I2 I3 I4 I5 Istr CK12 CK13 CK14 CK15 CK16 CK17 CK18 CK19 CK20 CK21 CK22 I1 I2 I3 I4 I5 b) Rescheduled code: CPU without forwarding Istr CK1 CK2 CK3 CK4 CK5 CK6 CK7 CK8 CK9…