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Full exam for Digital Systems Design Methodologies in the Computer Engineering degree programme at Politecnico di Milano. The document covers: Politecnico di Milano Dipartimento di Elettronica, Informazione e Bioingegneria prof. Fabrizio Ferrandi Digital Systems Design Methodologies 1 – February 12th 2016 Polimi ID _______ _______________________ Surname _______ __________________ Name _____________________  This is a

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Full exam for Digital Systems Design Methodologies in the Computer Engineering degree programme at Politecnico di Milano. The document covers: Politecnico di Milano Dipartimento di Elettronica, Informazione e Bioingegneria prof. Fabrizio Ferrandi Digital Systems Design Methodologies 1 – February 12th 2016 Polimi ID _______ _______________________ Surname _______ __________________ Name _____________________  This is a

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Politecnico di Milano Dipartimento di Elettronica, Informazione e Bioingegneria prof. Fabrizio Ferrandi Digital Systems Design Methodologies 1 – February 12th 2016 Polimi ID _______ _______________________ Surname _______ __________________ Name _____________________  This is a closed -book examination. You cannot use computers, phones or laptops during the exam.  Paper will be provided, but you should bring and use writing instrum ents that yield marks dark enough to be read easily. Erasable pens can be used.  Total available time: 1h:45m. Exercise 1 (6 points) _________________________ Exercise 2 (6 points) _________________________ Exercise 3 (9 points) _________________________ Exercise 4 (5 points) _________________________ Exercise 5 (7 points) _________________________ Digital Systems Design Methodologies 1 – February 12th 20166 2 /11 Exercise n. 1 Given the following circuit: 1) Compute the smallest clock period Tmax such that retiming has not to be applied 2) Apply the retiming with T= Tmax-1 Digital Systems Design Methodologies 1 – February 12th 20166 3 /11 Digital Systems Design Methodologies 1 – February 12th 20166 4 /11 Exercise n. 2 Given the following circuit: and the following technology library: a) Build the subject graph and determine the formulation of the binate covering problem for the technology mapping targeting area minimization. b) Identify one feasible solution (not necessarily the optimal one) using the DAGON heuristic. Digital Systems Design Methodologies 1 – February 12th 20166 5 /11 Exercise n. 3 Given the following C function: int check(int in1, int in2, int in3, int in4) { int t1, t2, t3, x1, x2, x3, x4, x40, x41, x42; t1 = in3 + in2; t2 = in1 - t1; t3 = t2 + in4; if(t3 == 0) { x1 = in1 * in4; x2 = in2 * in1; x3 = in3 * in2; x4 = in4…

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