25 08 2021 E T Santambrogio

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Dipartimento di Elettronica e Informazione Politecnico di Milano 20133 Milano (Italia) Piazza Leonardo da Vinci, 32 Tel. (+39) 02-2399.3400 Fax (+39) 02-2399.3411 Advanced Computer Architecture August 25, 2021 Prof. Marco Santambrogio Name Last Name Do ALL (if you know the answers) the theoretical questions but pick 2 out of th 3 problems, DO NOT DO ALL THE 3! 60’ to complete the exam. Questions (20%) Problem 1 (40%) Problem 2 (40%) Problem 3 (40%) Total (100%) Question 1 Name dependent instructions (Name dependence occurs when 2 instructions use the same register or memory location) can execute simultaneously but their relative order of execution cannot be changed. (True/False + Effectively support your answer) Question 2 Theoretically, an unlimited number of issues will be the best option to achieve the highest performance (True/False + Effectively support your answer) Question 3 Increasing the number of stages in a pipeline, it is always improving the performance (True/False + Effectively support your answer) Question 4 It is not possible to have heterogeneous multicore architectures sharing the same ISA (True/False + Effectively support your answer) Question 5 An Embarrassingly Parallel Algorithms is always gaining benefits by an increment in the number of cores provided by the underlying architecture. Note, in parallel programming, an embarrassingly parallel algorithm is one that requires no communication or dependency between the processes. (True/False + Effectively support your answer) Problem 1 Assume that the following code has been executed on a CPU with SCOREBOARD. Issue Read Op Exec Co. Write R. I1: LD F6 32+ R2 1 2 7 8 I2: ADDD F2 F6 F4 2 9 11 12 I3: MULTD F0 F6 F2 3 13 43 44 I4: SUBD F2 F2 F6 13 14 16 17 I5: ADDD F0 F12 F2 45 46 48 49 A. List all the…