31 08 2023 E T Silvano

Page 1

Surname (COGNOME) Name POLIMI Personal Code Signature Politecnico di Milano, 31 August, 2023 Course on Advanced Computer Architectures Prof. C. Silvano EX1 ( 5 points) EX2 ( 5 points) EX3 ( 2 points) EX4 ( 3 points) Q1 ( 5 points) Q2 ( 5 points) QUIZZES ( 8 points) TOTAL (33 points) Course on Advanced Computer Architectures – prof. C. Silvano EXAM 31 August 2023 – Please write in CAPITAL LETTERS AND BLACK/BLUE COLORS!!! Page 1 EXERCISE 1 – VLIW (5 points) Let’s consider the following LOOP code: Loop: LD F0,0(R2) LD F4,0(R3) FMUL F0,F0,F4 FADD F2,F2,F4 ADDUI R2,R2,#8 ADDUI R3,R3,#8 SUBUI R5,R4,R2 BNEZ R5,Loop Given a 3-issue VLIW machine with fully pipelined functional units: • 1 Memory Units with 3 cycles latency • 1 FP ALUs with 3 cycles latency • 1 Integer ALU with 1 cycle latency to next Int/FP & 2 cycle latency to next Branch The branch is completed with 1 cycle delay slot (branch solved in ID stage). No branch prediction. In the Register File, it is possible to read and write at the same address at the same clock cycle. 1) Considering one iteration of the loop, complete the following table by using the list-based scheduling (do NOT introduce any software pipelining, loop unrolling and modifications to loop indexes) on the 3-issue VLIW machine including the BRANCH DELAY SLOT. Please do not write in NOPs. Memory Unit Floating Point Unit Integer Unit C1 LD F0,0(R2) C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 Course on Advanced Computer Architectures – prof. C. Silvano EXAM 31 August 2023 – Please write in CAPITAL LETTERS AND BLACK/BLUE COLORS!!! Page 2 2. How long is the critical path for a single iteration? __________________________________ 3. What performance did you achieve in CPI? __________________________________________________________ 4. What performance…