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- University
- Politecnico di Milano
- Degree programme
- Computer Engineering
- Subject
- Fondamenti di Elettronica
- Academic year
- 2020-2021
- Classification
- Exam · Full exam
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- Exam paper only
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FdE 170721 sol
Study material for Fondamenti di Elettronica, shared by the Studwiz community and reviewed by moderators.
Fondamenti di ElettronicaFull exam
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FdE 21/07/2017 – BOZZA DI SOLUZIONE Es.1 a) Con A=B=1 OUT=3.3V, altrimenti OUT=0.7V. b) PDIN = C*VDD*(VDD-0.7V)*fA = 1pF * 3.3V * 2.6V * 3MHz = 25.74µW c) f(A,B)=AND. Servono due porte CMOS in cascata: NAND+INV. Es.2 a) VG=1.6V, Imos=0.512mA. Vout1=5.4V-1.6V=3.8V. Vout2=6V. entrambi i mos in saturazione. gm1=gm2=1.28mA/V b) 1 zero nell’origine, fp1=1/(2*π*C1*R1//R2)= 108Hz, fp2=1/(2*π*C2*(1/gm2+R3))=89.4MHz, fz=1/(2*π*C2*R3)=159MHz. In DC, G=0; @MF, G=1; @HF, G=0.56. c) 2 zeri nell’origine, fp1=1/(2*π*C1*R1//R2)= 108Hz, fp2=1/(2*π*C2*(1/gm2+R3))=89.4MHz In DC, G=0; @HF, G=0.56. d) @HF, vout=-0.56*vin. - Vgs1 + vin – (Vout1 – 0.56vin) < VT . vin<1.92V. - vin>-0.8V Es.3 a) V-=V+=0V. Imos=1mA. VoutOPAMP=2V. VDmos=4V. b) LSB=2.44mV. effetto Vos: Vout=0.5mV=0.2LSB; effetto IBIAS: Vout=0V. c) Passa basso, guadagno in continua pari a +1, polo a f=1/(2*π*C*R1)=10.6MHz Fase: 0 a bassa frequenza, -90° all’infinito. d) Gloop(s)=-A(s). PM=90°, il circuito è stabile. e) TSAMPLE=25µs-13µs=12µs. caso pessimo ΔV1=6V. εSAMPLE=6Ve(-TSAMPLE/τ)<1LSB. τ=Ron*C. Considerando caso pessimo per Ron, ovvero (Vgs-Vt)MIN,si ha k>1.15mA/V2.
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